(Digital Interpolation Filter and
data in-phase processor)
Two-channel Digital Interpolation Filter and data in-phase processor
for digital audio.
208-pin PQFP package, Manufactured on 300-mm wafers using, 90-nm
low-k dielectric process. Devices offer advanced features for
high-performance digital signal processing (DSP) applications with
up to 250-MHz.
Data and Master-clock in-phase processing just without jitters.
Core power supply voltage: 1.2V.
I/O power supply voltage: 3.3V.
Programmable Functions: hardware control mode.
Two-channel 1-times / 2-times / 4-times / 8-times oversampling ,
supports Bypass mode (NOS mode.).
Three-stage linear-phase ( group delay distortion : Zero) FIR
¡V50dB / -90DB / -130DB.
Passband Ripple: within
Input Data Formats: I2S
Input Word Length: 16, 20, or 24 Bits
Output Word Length: 16, 20, or 24 Bits
Output Data Formats: MSB-First, Binary Two¡¦s
Sampling Frequency: 32kHz to 96kHz( In DAC Reference One/Two ,
because they Applied DIR9001 receiver chip, so only
Supports 24 Bits,
Supports 24 Bits, 96 kHz Sample Rate
Clock Autodivide Circuit Supports four Master-Clock Frequencies :
Built-in two groups high performance PLL , supports low jitter